@All
Please test the kernels in the package 4.7-rc4-2.
We want to know if Darren's patch works.
Thanks,
Christian
Kernel 4.7
Re: Kernel 4.7
Both kernels boot Deb8 just fine.
Everything seems to be working.
Everything seems to be working.
A-Eon A1X1000 ATI HD6850, Creative SB1570 PCIe, RTL8139 net PCI.
Re: Kernel 4.7
Thanks a million for testing both kernels!mechanic wrote:Both kernels boot Deb8 just fine.
Everything seems to be working.
-
kilaueabart
- Posts: 1186
- Joined: Mon Mar 05, 2012 2:36 am
Re: Kernel 4.7
Since I replaced my previous 4.7 with the new one at the same time I put 4.7r on my CF CARD, I presume that's what I am using now.xeno74 wrote:kilaueabart wrote:...
Many thanks for testing the vmlinux-4.7r.
Could you please test the vmlinux-4.7 as well?
I have (incorrectly?) assumed that kernels with higher numbers do everything their predecessors did, plus. But I only test to see if they will boot, and have no idea if they have hidden new capabilities. I keep the "longterm" 4.1 on my CF CARD just in case, but as long as 4.7 works, I boot with it. How is 4.7r different?
Also I wonder about testing 4.6 now that I know 4.7 and 4.7r both work. I guess I will give it a try just for fun, but why the apparent step backwards?
I also see an "rc3.7" that has a kernel icon on my CF CARD, from 15 June, but I have no memory of how it got there or what it is really supposed to be.
Re: Kernel 4.7
I see. You have already tested the new kernel without "r". Thank you. 
The kernel 4.7r has RADIX MMU support and the kernel 4.6.3 is a bug fix update.
The kernel 4.7r has RADIX MMU support and the kernel 4.6.3 is a bug fix update.
Re: Kernel 4.7
I was unaware that the PA6T had a RADIX MMU.
Do the chips on the new AmigaOnes have this?
Do the chips on the new AmigaOnes have this?
A-Eon A1X1000 ATI HD6850, Creative SB1570 PCIe, RTL8139 net PCI.
Re: Kernel 4.7
I don't think they do - just a normal hash MMU.mechanic wrote:I was unaware that the PA6T had a RADIX MMU.
No - only power 9 has them to my knowledge.Do the chips on the new AmigaOnes have this?
Regards
Darren
Re: Kernel 4.7
No, they don't have this. The reason to test it was, that there is some RADIX source code in the problematic commit.mechanic wrote:I was unaware that the PA6T had a RADIX MMU.
Do the chips on the new AmigaOnes have this?
The PowerPC commits include some new source code for ISA 3.0 and it should handle all PowerPC CPUs.
Darren's patch:Aneesh Kumar K.V wrote: ISA 3.0 adds support for the radix tree style of MMU with full virtualization and related control mechanisms that manage its coexistence with the HPT. Radix-using operating systems will manage their own translation tables instead of relying on hcalls.
Radix style MMU model requires us to do a 4 level page table with 64K and 4K page size. The table index size different page size is listed below
PGD -> 13 bits
PUD -> 9 (1G hugepage)
PMD -> 9 (2M huge page)
PTE -> 5 (for 64k), 9 (for 4k)
We also require the page table to be in big endian format.
The changes proposed in this series enables us to support both hash page table and radix tree style MMU using a single kernel with limited impact. The idea is to change core page table accessors to static inline functions and later hotpatch them to switch to hash or radix tree functions. For ex:
static inline int pte_write(pte_t pte)
{
if (radix_enabled())
return rpte_write(pte);
return hlpte_write(pte);
}
Code: Select all
diff --git a/arch/powerpc/include/asm/book3s/64/hash.h b/arch/powerpc/include/asm/book3s/64/hash.h
index f61cad3..cd3e915 100644
--- a/arch/powerpc/include/asm/book3s/64/hash.h
+++ b/arch/powerpc/include/asm/book3s/64/hash.h
@@ -45,17 +45,17 @@
/*
* Define the address range of the kernel non-linear virtual area
*/
-#define H_KERN_VIRT_START ASM_CONST(0xD000000000000000)
-#define H_KERN_VIRT_SIZE ASM_CONST(0x0000100000000000)
+#define KERN_VIRT_START ASM_CONST(0xD000000000000000)
+#define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000)
/*
* The vmalloc space starts at the beginning of that region, and
* occupies half of it on hash CPUs and a quarter of it on Book3E
* (we keep a quarter for the virtual memmap)
*/
-#define H_VMALLOC_START H_KERN_VIRT_START
-#define H_VMALLOC_SIZE (H_KERN_VIRT_SIZE >> 1)
-#define H_VMALLOC_END (H_VMALLOC_START + H_VMALLOC_SIZE)
+#define VMALLOC_START KERN_VIRT_START
+#define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
+#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
/*
* Region IDs
@@ -64,7 +64,7 @@
#define REGION_MASK (0xfUL << REGION_SHIFT)
#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
-#define VMALLOC_REGION_ID (REGION_ID(H_VMALLOC_START))
+#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
#define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
#define VMEMMAP_REGION_ID (0xfUL) /* Server only */
#define USER_REGION_ID (0UL)
@@ -73,7 +73,7 @@
* Defines the address of the vmemap area, in its own region on
* hash table CPUs.
*/
-#define H_VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
+#define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
#ifdef CONFIG_PPC_MM_SLICES
#define HAVE_ARCH_UNMAPPED_AREA
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index 88a5eca..bdfea62 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -218,18 +218,6 @@ extern unsigned long __pte_frag_size_shift;
#define PUD_MASKED_BITS 0xc0000000000000ffUL
/* Bits to mask out from a PGD to get to the PUD page */
#define PGD_MASKED_BITS 0xc0000000000000ffUL
-
-extern unsigned long __vmalloc_start;
-extern unsigned long __vmalloc_end;
-#define VMALLOC_START __vmalloc_start
-#define VMALLOC_END __vmalloc_end
-
-extern unsigned long __kernel_virt_start;
-extern unsigned long __kernel_virt_size;
-#define KERN_VIRT_START __kernel_virt_start
-#define KERN_VIRT_SIZE __kernel_virt_size
-extern struct page *vmemmap;
-extern unsigned long ioremap_bot;
#endif /* __ASSEMBLY__ */
#include <asm/book3s/64/hash.h>
@@ -242,6 +230,7 @@ extern unsigned long ioremap_bot;
#endif
#include <asm/barrier.h>
+
/*
* The second half of the kernel virtual space is used for IO mappings,
* it's itself carved into the PIO region (ISA and PHB IO space) and
@@ -260,6 +249,8 @@ extern unsigned long ioremap_bot;
#define IOREMAP_BASE (PHB_IO_END)
#define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
+#define vmmemap ((struct page *)VMEMMAP_BASE)
+
/* Advertise special mapping type for AGP */
#define HAVE_PAGE_AGP
diff --git a/arch/powerpc/include/asm/book3s/64/radix.h b/arch/powerpc/include/asm/book3s/64/radix.h
index 937d4e2..a8b24d6 100644
--- a/arch/powerpc/include/asm/book3s/64/radix.h
+++ b/arch/powerpc/include/asm/book3s/64/radix.h
@@ -31,74 +31,6 @@
RADIX_PUD_INDEX_SIZE + RADIX_PGD_INDEX_SIZE + PAGE_SHIFT)
#define RADIX_PGTABLE_RANGE (ASM_CONST(1) << RADIX_PGTABLE_EADDR_SIZE)
-/*
- * We support 52 bit address space, Use top bit for kernel
- * virtual mapping. Also make sure kernel fit in the top
- * quadrant.
- *
- * +------------------+
- * +------------------+ Kernel virtual map (0xc008000000000000)
- * | |
- * | |
- * | |
- * 0b11......+------------------+ Kernel linear map (0xc....)
- * | |
- * | 2 quadrant |
- * | |
- * 0b10......+------------------+
- * | |
- * | 1 quadrant |
- * | |
- * 0b01......+------------------+
- * | |
- * | 0 quadrant |
- * | |
- * 0b00......+------------------+
- *
- *
- * 3rd quadrant expanded:
- * +------------------------------+
- * | |
- * | |
- * | |
- * +------------------------------+ Kernel IO map end (0xc010000000000000)
- * | |
- * | |
- * | 1/2 of virtual map |
- * | |
- * | |
- * +------------------------------+ Kernel IO map start
- * | |
- * | 1/4 of virtual map |
- * | |
- * +------------------------------+ Kernel vmemap start
- * | |
- * | 1/4 of virtual map |
- * | |
- * +------------------------------+ Kernel virt start (0xc008000000000000)
- * | |
- * | |
- * | |
- * +------------------------------+ Kernel linear (0xc.....)
- */
-
-#define RADIX_KERN_VIRT_START ASM_CONST(0xc008000000000000)
-#define RADIX_KERN_VIRT_SIZE ASM_CONST(0x0008000000000000)
-
-/*
- * The vmalloc space starts at the beginning of that region, and
- * occupies a quarter of it on radix config.
- * (we keep a quarter for the virtual memmap)
- */
-#define RADIX_VMALLOC_START RADIX_KERN_VIRT_START
-#define RADIX_VMALLOC_SIZE (RADIX_KERN_VIRT_SIZE >> 2)
-#define RADIX_VMALLOC_END (RADIX_VMALLOC_START + RADIX_VMALLOC_SIZE)
-/*
- * Defines the address of the vmemap area, in its own region on
- * hash table CPUs.
- */
-#define RADIX_VMEMMAP_BASE (RADIX_VMALLOC_END)
-
#ifndef __ASSEMBLY__
#define RADIX_PTE_TABLE_SIZE (sizeof(pte_t) << RADIX_PTE_INDEX_SIZE)
#define RADIX_PMD_TABLE_SIZE (sizeof(pmd_t) << RADIX_PMD_INDEX_SIZE)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 3759df5..41503d7 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -38,7 +38,7 @@
* ISA drivers use hard coded offsets. If no ISA bus exists nothing
* is mapped on the first 64K of IO space
*/
-unsigned long pci_io_base;
+unsigned long pci_io_base = ISA_IO_BASE;
EXPORT_SYMBOL(pci_io_base);
static int __init pcibios_init(void)
@@ -47,7 +47,6 @@ static int __init pcibios_init(void)
printk(KERN_INFO "PCI: Probing PCI hardware\n");
- pci_io_base = ISA_IO_BASE;
/* For now, override phys_mem_access_prot. If we need it,g
* later, we may move that initialization to each ppc_md
*/
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index b2740c6..bfbb3c8 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -910,14 +910,6 @@ void __init hash__early_init_mmu(void)
__pmd_val_bits = 0;
__pud_val_bits = 0;
__pgd_val_bits = 0;
-
- __kernel_virt_start = H_KERN_VIRT_START;
- __kernel_virt_size = H_KERN_VIRT_SIZE;
- __vmalloc_start = H_VMALLOC_START;
- __vmalloc_end = H_VMALLOC_END;
- vmemmap = (struct page *)H_VMEMMAP_BASE;
- ioremap_bot = IOREMAP_BASE;
-
/* Initialize the MMU Hash table and create the linear mapping
* of memory. Has to be done before SLB initialization as this is
* currently where the page size encoding is obtained.
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index c939e6e..9c5de01f 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -325,12 +325,6 @@ void __init radix__early_init_mmu(void)
__pud_val_bits = RADIX_PUD_VAL_BITS;
__pgd_val_bits = RADIX_PGD_VAL_BITS;
- __kernel_virt_start = RADIX_KERN_VIRT_START;
- __kernel_virt_size = RADIX_KERN_VIRT_SIZE;
- __vmalloc_start = RADIX_VMALLOC_START;
- __vmalloc_end = RADIX_VMALLOC_END;
- vmemmap = (struct page *)RADIX_VMEMMAP_BASE;
- ioremap_bot = IOREMAP_BASE;
/*
* For now radix also use the same frag size
*/
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index e009e06..1408776 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -94,24 +94,12 @@ unsigned long __pud_val_bits;
EXPORT_SYMBOL(__pud_val_bits);
unsigned long __pgd_val_bits;
EXPORT_SYMBOL(__pgd_val_bits);
-unsigned long __kernel_virt_start;
-EXPORT_SYMBOL(__kernel_virt_start);
-unsigned long __kernel_virt_size;
-EXPORT_SYMBOL(__kernel_virt_size);
-unsigned long __vmalloc_start;
-EXPORT_SYMBOL(__vmalloc_start);
-unsigned long __vmalloc_end;
-EXPORT_SYMBOL(__vmalloc_end);
-struct page *vmemmap;
-EXPORT_SYMBOL(vmemmap);
unsigned long __pte_frag_nr;
EXPORT_SYMBOL(__pte_frag_nr);
unsigned long __pte_frag_size_shift;
EXPORT_SYMBOL(__pte_frag_size_shift);
-unsigned long ioremap_bot;
-#else /* !CONFIG_PPC_BOOK3S_64 */
+#endif /* !CONFIG_PPC_BOOK3S_64 */
unsigned long ioremap_bot = IOREMAP_BASE;
-#endif
/**
* __ioremap_at - Low level function to establish the page tables
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index dfdb90c..15b8f71 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -91,7 +91,7 @@ slb_miss_kernel_load_vmemmap:
* can be demoted from 64K -> 4K dynamically on some machines
*/
clrldi r11,r10,48
- cmpldi r11,(H_VMALLOC_SIZE >> 28) - 1
+ cmpldi r11,(VMALLOC_SIZE >> 28) - 1
bgt 5f
lhz r11,PACAVMALLOCSLLP(r13)
b 6f
Link: A1K.org
Cheers,
Christian
Re: Kernel 4.7
I read about 10 pages on this RADIX/STANDARD under a single kernel topic and I imagine it will be awhile to implement it in a manner suitable to both. Too bad those guys don't have X1000.
You guys both get two 'Atta Boy's.
You guys both get two 'Atta Boy's.
A-Eon A1X1000 ATI HD6850, Creative SB1570 PCIe, RTL8139 net PCI.
Re: Kernel 4.7
They released the powerpc-4.7-4 commit today. I think I can't update my local Git anymore because I have reverted the 3 other updates (commits) and this update (commit) needs the three other updates.mechanic wrote:I read about 10 pages on this RADIX/STANDARD under a single kernel topic and I imagine it will be awhile to implement it in a manner suitable to both. Too bad those guys don't have X1000.
You guys both get two 'Atta Boy's.
I'll try to patch the RC5 with Darren's patch on Monday.