Level 3 cache not detected

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Re: Level 3 cache not detected

Post by Hypex »

sailorMH wrote: Tue Aug 29, 2023 7:24 am
And is possible to enable L2 with some kernel parameter? Like l2cr or cachesize= ? Or is it done by parameters during kernel compilation?
Yes, it was a kernel parameter for a long time now, from early kernels.
I checked commandline kernel parameters, and there are l2cr=0x80000000
My 7455 has 256 kB L2, i.e. 0x40000 and 0x80000000 is 2 GB...
I see what you mean here. I never looked at it that way before. As you found out it describes cache register which is a little technical and not memory size but that's a good guess!
But, kernel parameter meaning should differ from CPU l2cr register and maybe other L2 parameters should be set. But this I don't understand.
I will try l2cr=3 on weekend and we will see.
I think you must have done the most research of anyone! It is a good idea to look it up. So, though it is PPC specific, there should be info in the kernel command line documentation but it only says [ PPC ] and nothing else. The most I can find is in an article below. What I do recall is it being set to 0x80000000 for on or 0x00000000 for off but I've seen nothing else mentioned.


Also, there is l3cr if you want to experiment. Unfortunately you will need to consult the technical guide again. :)

https://docs.kernel.org/admin-guide/ker ... eters.html
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Re: Level 3 cache not detected

Post by sailorMH »

Thank you for link to olegil/amiga.

it is at least some explanation. I found also some codes with l2cr settings for some powermac cards, and it is more complex. I copy them here tomorrow.

It means, that kernel parameter l2cr ( and l3cr ) is not exact copy of CPU l2cr/l3cr register, but write into them some important values. Like on / off ;-). It would be great to know other bits meaning.

Back to XE testing:
my kernel cmdline is:

Code: Select all

cat /proc/cmdline 
root=UUID=a7128a20-0df5-4cc8-8400-2b3dc958a5c7 console=tty0 l2cr=0x80000000 video=radeonfb:off libata.dma=1 radeon.modeset=1
so the l2cr parameter is correctly set. But:

In /proc/sys/kernel/ after boot is no l2cr file.

Code: Select all

echo 0x80000000 > /proc/sys/kernel/l2cr
ends with no such file or directory

I am not kernel expert, but it look like the kernel is compilled without L2 support, and cmdline parameter l2cr and /proc/sys/kernel/l2cr has no effect.

I checked Debian 8 on Pegasos 2:
there is also no file /proc/sys/kernel/l2cr
but lshw - C memory shows both L1 and L2 cache
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